Signal Normalization to Improve LM3900 Antilog Generator

The original circuit that the New LM3900 Antilog Generator was derived from orginally is show below:
First version of LM3900 Antilog Generator

This version actually worked, which was definitely nice! But it was too tied to the bipolar opamp circuit variant, when in fact the LM3900 allowed other possibilities that offered better system interoperability. One thing was clear though, and that was with the 1KΩ +3300ppm/°C resistor in circuit with the 2SA798 dual-matched PNP transistor, the thermal stability was stellar. So, that aspect needed to be included in a fully developed next-version circuit.

Other problems were present though. Because the original circuit was derived from its bipolar counterpart, the antilog transistor has the base grounded. This results in a Vcb > 0, due to the +Vbe clamped inputs the the LM3900, which doesn't help with log/antilog ideality. Secondly, the current reference side of the circuit only had a preset voltage (of nominally +1Vbe) at the emitters of the transistor pair. This voltage was however inflexible, wrt to the +Vbe to 0 volt input available from the 1V/octave attenuator. In addition, the only way the antilog generator would work is with a control voltage inversion: a  -10V to 0V input signal was required to properly direct the necessary current division in the antilog transistors. So, a means of relatively setting ΔVbe's with respect to each other was needed.

And lastly, the current to voltage readout opamp (which is naturally done with the LM3900) was setup to readout inverting, where increasing input causes the antilog to ramp down against a preset DC reference. This inversion is not so useful for many following circuits (like a V/F convertor ...). In any case, it turns out this inversion is definitely unnecessary, because the LM3900 is a device that can readout and display the antilog transistor current positively.

To solve the Vcb ≈ 0V issue, it was clear that the matched-pair bases needed be at +1Vbe, and their common emitters at +2Vbe, where in this case "Vbe" is relative to the LM3900. Again, the LM3900 is amazingly adaptable for generating such voltages, using the nVbe biasing trick described in AN-72. When no resistor from the -input to ground is used, but a feedback resistor is, the LM3900 merely relays the +Vbe seen at the -input. When a resistor is added that matches the feedback resistor, the nVbe produced is 2. These circuits were separately tested, as shown in the engineering notebook drawing below:

LM3900 +Vbe circuits

It later appeared that the 1V to 18mv attenuator (for 1V/octave antilog ranging) could just be buffered with a gain of +1, through the non-inverting or +input of the LM3900. And that since that junction would be at a nominal low impedance, "tapping" it with a modest-valued resistor into the LM3900 +input would not greatly degrade accuracy. Morever, in the final circuit since the 1V/octave scaling would need to be adjustable anyway, the trimpot used for this could accomodate scaling for a very small voltage divider error present at the +input. Adding a common mode resistor for the +input adds another smaller-yet voltage division error that could be trimmed out, but enables the input signal swing to go all the way to 0 volts and below. Because the +Vbe present at the -input is always represented at the output, the control voltage normalization circuit acts just like a "nVbe" biased one. To bring the output voltage down to +1Vbe, while still relaying the buffered attenutated control voltage is done easily: just add an additional constant current input into the -input that is roughly equal to the full-scale input seen at the +input; through a trimpot ranged between +15 and ground, it's possible to offset the center-point anywhere in relation to a fixed +1Vbe reference voltage. These circuits were separately tested in the schematic from my engineering notebook:

Signal normalization circuits for ΔVbe offset voltage generation

The attenuator circuit takes a Δ10V signal and reduces it to Δ180 mV, the amount needed as a ΔVbe to create a 1024:1 dynamic range in collector current from the antilog transistor. Note that this is only the nominal range, at 300°K; the 1KΩ +3300ppm/°C resistor will scale this range proportionally. The new normalization circuit however now will allow setting that nominal Δ180 mV anywhere convenient around the reference +1Vbe signal. A good setup is to preset it for ±90 mV around the reference +1Vbe. Ultimately, this will allow setting the Iref reference current so that at +90 mV ΔVbe, the antilog current will be 32x. Conversely, with -90 mV ΔVbe, the antilog current will be ÷32. This encompasses the full needed 1024x range (32 x 32) for 10 octaves (e.g. 10 doublings: 5 octaves above the reference current, and 5 octaves below it). The scope foto next shows this ±90 mV about +1Vbe, along with the input signal ranging from 0 to +10V. The cursors mark the Δ180 mV signal at the +input of the LM3900.
±90 mV ΔVbe centered about +1Vbe for LM3900, for 0V to +10V input

What's really amazing about this circuit is that it accepts other input voltage ranges with ease, including negative ones. When common mode input resistors are provided the LM3900 inputs, the external input voltage can be about or near zero, and even below ground, negative. The next scope foto shows the precise shift of the attenuated 180 mV signal, by shifting the input signal from -5V to +5V. This shift shows the tip of the maximum signal just touching +1Vbe.
180 mV ΔVbe set to just touch +1Vbe, for -5V to +5V input

Continuing the progression, the next scope foto shows the control voltage input from -10V to 0V push the 180 mV signal to the edge of the range it was at for 0 to +10V ... and precisely! Not shown in these fotos though is that the voltage offset of the Δ180 mV attenutated input can be preset to always intersect the +1Vbe. So: one circuit, running on only a +15V power supply can support inputs ranging anywhere from -10V to +10V, with any Δ10V input control voltage segment desired represented in the unipolar 1024:1 antilog output.
180 mV ΔVbe set below +1Vbe, for -10V to 0V input



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